The present invention relates generally to DC-DC converters, and more particularly to circuitry and methods which substantially increase the conversion efficiency and reduce costs of SIMO (single inductor multiple output) DC-DC converters.
It should be understood that DC-DC converter technology has improved relatively slowly, but the advent of large, powerful computing devices on a single integrated circuit chip and the need to reduce their power consumption (especially in mobile devices) has led to the need for multiple on-chip power sources to provide a range of relatively high power supply voltages to various faster, higher-performance portions of the chip and a range of relatively low power supply voltages to various slower, lower performance portions of the chip. For example, circuitry in one part of the chip may need to operate very fast, and this may be accomplished by increasing the power supply voltage for that part of the chip while the power supply voltage or voltages are much lower on slower parts of the chip. Unfortunately, adding a large number of DC-DC converters to provide different power supply voltages in various parts of the chip usually is not practical because that has required adding a corresponding number of external inductors and capacitors and associated package leads, which is very costly.
Consequently, and as a practical matter at the present state-of-the-art, only seven or eight separate power supply voltages ordinarily are provided on a relatively large chip, and only one or two separate power supply voltage circuits are provided on a relatively small chip because of the high cost of the external inductors required for each DC-DC voltage converter. Although the cost of using larger and more complex high-performance integrated circuits that require many individually controllable DC-DC converters is very high, if the energy efficiency of the DC-DC converter circuitry could be substantially improved then the power efficiency of entire on-chip systems could be correspondingly improved.
One approach to accomplishing this goal has been to provide SIMO (Single Input, Multiple Output) DC-DC converters which require only one external inductor but nevertheless can provide multiple individually controllable power supply voltages by “sharing” the single inductor. Unfortunately, the best SIMO DC-DC converters presently available have a number of drawbacks, including lower power efficiency and higher cost than using an equivalent number of SISO (Single Input, Single Output) DC-DC converters. This is because of various complex problems associated with sharing power supply energy produced at a single output among a number of outputs.
Referring to “Prior Art” FIG. 1A, a simplified schematic of a prior SIMO (Single Inductor, Multiple Output) DC-DC converter 1 includes an input switch circuit 3A,3B receiving an input voltage VIN, which typically is the output of a battery. An input switch 3A is connected between VIN and a conductor 4 which is connected to one terminal of an inductor L. Inductor L typically is an external power inductor. Also, an input switch 3B is connected between conductor 4 and ground. The other terminal of inductor L is connected to one terminal of each of multiple output switches 6-1, 6-2, . . . 6-N. The other terminals of output switches 6-1, 6-2, . . . 6-N produce output voltages VOUT1, 2, . . . 5 on one terminal of each of load capacitances CL1, 2, . . . N, respectively. Another terminal of each of load capacitances CL1, 2, . . . N is connected to ground.
FIG. 1B shows a pictorial diagram of a large “charge reservoir” 2 representing battery 2 of FIG. 1A, which holds a large amount of charge. Underneath reservoir 2 is a relatively large “bucket” 7 which represents inductor L in FIG. 1A. Bucket 7 is filled precisely to capacity with charge through a controlled valve S. Bucket 7 then is sequentially passed, as indicated by reference numerals 7-1, 2 . . . N, over various smaller buckets representing output capacitors CL1, 2, . . . N, respectively, to precisely fill each of the smaller buckets CL1, 2, . . . N. However, if bucket 7 is over-filled (i.e., inductor L is overcharged), there is a loss or waste of energy. Or, if bucket 7 is under-filled (i.e., inductor L is under-charged), then at least one of the output buckets CL1, 2, . . . N will not receive enough charge. The phenomenon of under-filling or under-charging the inductor and not being able to supply enough charge to each of the outputs during a given cycle is called “cross regulation”, and this is a basic problem for SIMOs. (Cross regulation is defined as the change in output voltage of one output caused by a change in voltage of or current in another output. The term “load regulation” refers to change of an output due to changes in the load current delivered to or drawn by a load connected to that output.) Load regulation problems may prevent accurate voltage regulation of at least some of the output power supply voltages VOUT1, 2, . . . 5. The parallel horizontal dashed lines extending from bucket 7 in FIG. 1B represent an amount of intentional overcharging or undercharging of inductor L to ensure that there is enough charge/current for all of the buckets or output capacitors 7-1, 7-2 . . . 7-N.
Prior SIMO DC-DC converters have lower power efficiency than SISO DC-DC converters when the inductor L is “overcharged”. There are a number of reasons why a SIMO converter has lower power efficiency than a SISO converter. One reason is the charge sharing from the single inductor to the multiple outputs, wherein the single inductor may be either overcharged or undercharged. A SIMO converter needs to deal with the sharing of charge/current from the single inductor and that reduces the DC-DC converter efficiency. Another problem of prior SIMO DC-DC converters is that they include an additional input switch that inherently reduces power efficiency, because each input switch is coupled in series between the input and the multiple outputs, respectively, of the output of the SIMO DC-DC converter. That adds both conductive power loss and switching power loss for each output switch transistor, and also increases EMI (electromagnetic interference) due to operating the various switch transistors.
Prior Art FIG. 2 is a block diagram of a SIMO DC-DC converter 10 configured as a buck converter, as shown in the article “Near-Independently Regulated 5-Output Single-Inductor DC-DC Buck Converter Delivering 1.2 W/mm2 in 65 nm CMOS”, by Chien-Wei Kuan and Hung-Chih Lin, pp. 274-276, 2012 IEEE International Solid-State Circuits Conference/Session 16/Switching Power Control Techniques. This SIMO DC-DC converter generally indicates the present state-of-the-art for SIMO DC-DC converters. In FIG. 2, SIMO DC-DC converter 10 includes an input switch circuit coupled by conductor 2A to receive the battery voltage VBAT. The input switching circuitry includes P-channel input transistor MP and N-channel input switch transistor MN having their drains coupled by conductor 4 to external inductor L. SIMO DC-DC converter 10 also includes an “adaptive energy recovery control circuit 11, control circuitry 14, output switch circuit 6 including output transistors MS1, 2, . . . 5, and a current sensing circuit 12. Individually controllable DC output voltages VOUT1, 2, . . . 5 are generated on 5 separate capacitive loads (which are each modeled as a capacitor in parallel with a current source).
Adaptive energy recovery circuit 11 includes P-channel transistor MDR having its source connected to VBAT and the source of input transistor MP. The drains of input transistors MP and MN are connected by conductor to one terminal of external inductor L, the other terminal of which is connected by conductor 5 to the sources of the output switch transistors MS1, 2, . . . 5 and to an input of current sensing circuit 12. The drain of transistor MDR is connected to conductor 5. Switch transistor MDR provides a path from ground to the battery (not shown) which supplies VIN, through which any excess charge/current in inductor L is returned back to the battery. Switching transistor MDR allows overcharge current in inductor L to be returned to the battery with almost no loss. Switch transistor MDR in FIG. 2 also allows deliberate overcharging of inductor L so that extra load current is available to be supplied to any of the loads, including capacitors CL1, 2, . . . 5 and current sources I0, 1, 2 . . . 5, that need additional load current. That avoids cross regulation problems because if one output load changes and “steals” too much load current, it does not occur at the expense of another output load, and any overcharge current remaining in inductor L at the end of the present cycle is returned to the battery through switch transistor MDR.
The capacitive load coupled to the drain of output switch transistor MS1 includes capacitor CL1 and current source IO1; the loads coupled to the drains of the remaining output switch transistors are modeled similarly. The gates of output switch transistors MS1, 2, . . . 5 are coupled to the control signals VS1, 2, . . . 5, respectively, that are generated by block 22. Control circuit 14 includes internal voltage circuitry 15 which generates regulated voltages equal to 2.8 V and VIN −2.8 V from its input voltage VIN. Control circuit 14 also includes voltage selection circuit 17, which performs the functions of generating the signals VHP and VHN which then are utilized in block 21 to set the desired level shift of voltages to be applied to the drivers in blocks 22 and 24. Control circuit 14 also includes an analog controller circuit 18 which receives the output signals VOUT1, 2, . . . 5, associated reference voltages VREF1, 2, . . . 5, current sensing output signal ILSEN, and VAR which is generated by the circuitry in blocks 18 (which includes comparators), 20, and 22 in response to feedback from the outputs VOUT1, 2, . . . 5. The output of analog controller circuit 18 is provided as an input to switch control logic 20, the outputs of which are provided as inputs to level shifter circuits 21 which receive the signals VHP, VHN. The outputs of level shifter circuits 21 are applied to inputs of gate driver circuits 22 and 24, and VIN −2.8 V. Gate driver circuitry 22 generates the signals VS1, 2, . . . 5, VP, and VDR the output of gate driver circuit 24 generates the signal VN.
The SIMO DC-DC converter 10 of Prior Art FIG. 2 is much smaller than earlier SIMO DC-DC converters, and includes two transistor switches, including input switch transistor MP coupled in series with any selected one of output switch transistors MS1, 2 . . . , 5 through a path from the converter input VIN to any of the its outputs VOUT1, 2, . . . 5. Both input switch MP and the selected output switch dissipate a significant amount of power. The output capacitors CL1, 2, . . . N are relatively large, which is undesirable because they add substantially to the total system cost.
Prior Art FIG. 3A illustrates a basic “resonant” SISO DC-DC converter, similar to FIG. 1 of the article “Family of Soft-Switching Resonant DC-DC Converters” by M. Jabbari et al., pp. 113-124, IET Power Electronics, 2009, Vol. 2, Issue 2, incorporated herein by reference. The working modes of this resonant DC-DC converter include a full resonance mode, a partial resonance mode, a linear current mode, and a dead time mode, as fully described in the Jabbari et al. article. Phase 1 includes charging the inductor L and output capacitor CL. The inductor current IL is positive and increasing. In FIG. 3A, with VRES precharged to 2×VIN and switch SW3 OFF, switch SW1 is turned ON in a “ZCS” (zero current switching) mode, but not in a ZVS (zero voltage switching) mode. Current flows from the node VRES or ground to VOUT1 via resonant capacitor CRES, inductor L, and switch SW1 while VRES is greater than VOUT1. Phase 2 includes discharging inductor L and charging output capacitor CL. Inductor current IL is positive but decreasing. In FIG. 3A, while 0<VRES<VOUT1, current flows from the node VRES or ground through resonant capacitor CRES, inductor L, and switch SW1. When VRES is less than or equal to 0, current flows from ground to VOUT1 via switch SWR, inductor L, and switch SW1. Phase 3 is referred to as the “resonant mode” phase, during which the direction of inductor current IL is negative. In FIG. 3A, current flows from ground to VIN via switch SW3 when both switches SW1 and SWR are OFF, to allow the charge associated with VRES to return to a voltage level equal to 2×VIN.
Prior Art FIG. 3B illustrates a basic “resonant” two-output SIMO buck DC-DC converter similar to the one shown in FIG. 1 of the article “Simulation and Implementation of a New Topology in Multi-Output DC-DC Resonant Converters Based on SWRC Converters” by S. H. Shahalami et al., pp. 75-80, IEEE 2011 2nd Power Electronics, Drive Systems and Technologies Conference. The resonant 2-output SIMO buck converter of Prior Art FIG. 3B is quite similar to the resonant single output SISO buck converter of Prior Art FIG. 3A. The difference between the two is in using two (or more) output switch transistors, rather than one. Input switch transistor Q0 is used to connect the DC input source voltage VIN to the resonator tank circuit L,CRES and the 2 output switch transistors Q1 and Q2 are used to connect the resonator L,CRES to 2 output load capacitors CL1 and CL2, respectively. The working modes include a full resonance mode, a partial resonance mode, a linear current mode, and a dead time mode, as fully described in the above mentioned Shahalami et al. paper. State waveforms for the DC-DC converter of FIG. 3B are shown in FIG. 3C, and are the same as in FIG. 2 of the Shahalami et al. reference.
In a conventional non-resonant DC-DC converter, the inductor current IL flows unidirectionaly relative to the inductor. For example, there is only “positive inductor” current from VIN to Vout for a conventional buck converter. In contrast, in “resonant” DC-DC converters the current flow IL in inductor L and the capacitor CRES that form the resonator have both “positive” and “negative” values. The resonant architecture shown in FIG. 3A, with resonant capacitor CRES and also including a resonant diode DRES, allows both positive and negative current flow through inductor, which also true for the resonant architecture of the SIMO DC-DC converter shown in FIG. 3B.
Resonant DC-DC converters have lower or zero dynamic losses and lower EMI than non-resonant converters, due to the “soft switching” techniques for turning switch transistors on and off such that there is zero voltage across or zero current through the switch transistors while they are being switched.
To summarize, current state-of-the-art resonant DC-DC converters can be used to provide “soft-switching” and higher efficiency SIMO DC-DC converters. (The term “soft switching” refers to switching using ZVS (zero voltage switching) and/or ZCS (zero current switching) techniques.) Most of current state of the art switch-based resonant converters have several drawbacks that make them less desirable than standard DC-DC converters. These drawbacks include higher RMS current in the inductor, higher voltage seen by power switches (sometimes more than double the input voltage seen by the power switches), and limited power density output. The SIMO (Single Inductor Multiple Output) DC-DC converter has recently been used frequently due to its ability to utilize the full energy storage capacity of a single inductor shared by multiple output loads to avoid the need to provide multiple LDO (low drop out) voltage regulators. The use of SIMO DC-DC converters therefore potentially allows higher system power efficiency and reduced system cost, but unfortunately, the cost of present state-of-the-art SIMO DC-DC converters is high. They also generate high EMI (electromagnetic interference) have cross-regulation problems.
Thus, there is an unmet need for a resonant DC-DC converter having lower RMS current and reduced voltages across the power switches than is the case in prior DC-DC converters having somewhat comparable performance.
There also is an unmet need for a resonant DC-DC converter which allows higher system power efficiency and lower system cost than is the case in prior DC-DC converters having somewhat comparable performance.
There also is an unmet need for a resonant SIMO DC-DC converter which allows higher system power efficiency and lower system cost than is the case in prior SIMO DC-DC converters having somewhat comparable performance.
There also is an unmet need for a resonant SIMO DC-DC converter which has lower cross-regulation, higher power efficiency for a given integrated circuit package volume, and lower cost than prior SIMO DC-DC converters having somewhat comparable performance and than prior SISO DC-DC converters having somewhat comparable performance.
There also is an unmet need for a resonant SIMO DC-DC converter which has a less limited range of input and output voltages than prior SIMO DC-DC converters having somewhat comparable performance.
There also is an unmet need for a resonant SIMO DC-DC converter which generates less electromagnetic interference than prior SIMO DC-DC converters having somewhat comparable performance.
There also is an unmet need for a resonant SIMO DC-DC converter which makes it possible to use a relatively large number of low-voltage transistors in a high voltage DC-DC converter.